Electronic ballast circuit for operating a high intensity discharge lamp

ABSTRACT

An electronic ballast circuit (FIG.  1 ) includes a voltage-regulated DC power source and an H-bridge having a plurality of transistors (Q 5,  Q 6,  Q 7,  Q 8 ). The circuit operates a high intensity discharge lamp ( 50 ). A regulating circuit electrically connected to the transistors regulates the peak current flowing through the H-bridge by discharging a parasitic capacitance (C parasitic).

[0001] This application claims priority to Provisional Application S/No.60/178,005 filed on Jan. 24, 2000.

TECHNICAL FIELD

[0002] The present invention relates to an electronic ballast circuitand a method of operating the circuit. The electronic circuit detectsand limits peak current surge, specifically peak current surge through ahigh intensity discharge (HID) lamp.

BACKGROUND AND RELATED ART

[0003] An inrush of current occurs after ignition of a typical D1 HIDlamp. This current nominally has a peak of 30 A. A lamp of this type,like any lamp used in automotive HID circuitry, uses an H-bridge, orFull Bridge, as a switching circuit to provide AC current to the lamp.The 30 A surge can cause unreliable operation of the H-bridge controlcircuitry, or failure of the H-bridge MOSFET switches.

[0004] Handling high current through an electronic ballast circuitry canbe accomplished in a variety of ways. One way is to utilize components,such as MOSFETs, that are rated at a given current level that is as highor higher than the maximum current through the system. One drawback ofusing components having a high current rating is that they are moreexpensive. Also, the higher rated components tend to be larger andheavier than their lower rated counterparts. In most applications, thespace occupied by the components and the weight of the components shouldbe kept to a minimum.

[0005] A second way of handling the excess current is to install acomponent that provides for controlled inrush of “ON” current. Suchcomponents include, but are not limited to, a thyristor or pair ofthyristors in an active filter-voltage step-up circuit as disclosed inU.S. Pat. No. 5,719,473 to Huber et al; an output stage designed as astep-up regulator or a blocking oscillator as disclosed in U.S. Pat. No.5,877,614 to Huber; an oscillatory transformer as disclosed in U.S. Pat.No. 6,078,144 to Twardzik; a multivibrator with hysteresis as disclosedin EP0 757,420; or an inductor of sufficient volt-second capability. Theinductor would normally be placed in series with the lamp to limit thepeak current. Installing any of these components increases the overallsize, complexity and cost of the system.

SUMMARY OF THE INVENTION

[0006] It is an object of the present invention to utilize an existinglower rated MOSFET in an H-bridge circuit to limit current flowingtherethrough.

[0007] Another object of the present invention is to reduce the gatevoltage of a MOSFET in an H-bridge during the period following lampignition to limit current flowing through the MOSFET.

[0008] A further object of the present invention is to provide a methodfor limiting the current through the MOSFET using parasitic capacitance.

[0009] The present invention achieves these and other objects by usingat least one of the existing H-bridge MOSFET switches to limit the D1lamp surge current to a level that is within the rating of the existingdevices. The present invention makes use of a parasitic capacitance thatis created by operating the circuit in the preferred embodiment. Drawingvoltage from one of the resistors in the circuit in order to dischargethe parasitic capacitance reduces the voltage at the gate of the MOSFET.The gate then partially closes and the current across the MOSFET is thenlimited. An advantage of using this approach is that by detecting andlimiting the surge, the addition of external components or costlyoversized switching MOSFETs can be avoided.

BRIEF DESCRIPTION OF THE DRAWINGS

[0010] This invention may be clearly understood by reference to theattached drawing which shows an electronic ballast circuit for an HIDlamp according to a preferred embodiment of the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] For a better understanding of the present invention, togetherwith other and further objects, advantages and capabilities thereof,reference is made to the disclosure and accompanying claims taken inconjunction with the above-described drawing.

[0012] The preferred embodiment of this invention is illustrated in thedrawing. In this embodiment, a lamp 50 is an automotive D1 HID lamp. Thelamp 50 may be integral with an igniter transformer 60. The lamp 50 andthe transformer 60, are represented by the circuit inside the dashed box70.

[0013] The output of a ballast provides a DC voltage that is fed to anH-bridge switching circuit 30. Any such ballast with appropriatemodulation may be used. The output of the H-bridge 30 has a squarewavevoltage with a frequency of approximately 500 Hz. The components of theH-bridge and the operation are described below.

[0014] The discharge lamp 50 includes a conventional sealed arc tube 51that defines a discharge space therein. The arc tube 51 may betransparent or translucent, as desired. A mercury free halide fill isincluded within the discharge space in a conventional manner.

[0015] The discharge lamp 50 includes two electrodes sealed therein forestablishing an arc discharge. For example, the arc tube 51 comprisestwo electrodes 53 and 54 sealed therein at opposite ends in aconventional manner. Electrode 54 is electrically connected to aconnector 66 and electrode 53 is electrically connected to transformer60 which is in turn electrically connected to connector 68 therebyelectrically connecting the arc tube 51 to the H-bridge switchingcircuit 30.

[0016] The H-bridge switching circuit 30 contains four MOSFETs; twolow-side MOSFETs Q5 and Q6 and two high-side MOSFETs Q7 and Q8. Duringsteady state operation, the circuit alternates between Q6,Q8 ON, Q5,Q7OFF and Q6,Q8 OFF, Q5,Q7 ON. Since the invention relates to the time upto and immediately following ignition, the circuitry will only bedescribed in relation to Q6 and Q8, particularly the detection andcontrol circuitry connected to the gate of Q8.

[0017] Q6 and Q8 are held ON prior to, during and immediately afterignition. The drive source, phase B (PHB) for Q8 is a switched DCsource, i.e., the drive source cycles between −85 volts and ground, andhas a frequency of about 500 Hz. The drive source (PHA) (not shown) forQ7 operates in the same manner. The two drive sources (PHB, PHA) are 180degrees out of phase and operate at about 50% power.

[0018] The drawing illustrates an embodiment of a gate drive(controlling) circuit for an isolated gate device Q8 constructedaccording to the present invention. In this embodiment, the isolatedgate device Q8 is an MOSFET. Those skilled in the art will understand,however, that the gate drive circuit may also be used to drive otherFETs, IGBTs and MCTs. Of course, one gate drive circuit may drive one ormultiple isolated gate devices Q.

[0019] The gate drive circuit includes an energy storage capacitor C28connected to the high side of the ballast voltage output Vout andcoupled in series to a resistor R14 that is in turn coupled to the lowside of the power source. C28 is also coupled in parallel to a zenerdiode D7. Of course, in other embodiments, the diode D7 may not be azener diode. C28, R14 and D7 together form a regulated supply fortransistor Q11. Q11 and transistor Q15 are in a totem-pole configurationconnected between the C28/R14 connection and the high side of the powersource as shown in FIG. 1. In the illustrated embodiment, the totem-poleconfiguration consists of an npn transistor Q11 serially-coupled to afirst pnp transistor Q15. A transistor R79 is between the emitters ofQ11/Q15 and the gate of Q8.

[0020] A second pnp transistor Q39 acts as a current source to maintain10VDC across resistor R75. R75 is connected to the high side of thepower source and is used for static protection and to pull down the gateof Q8 and thus turn OFF MOSFET Q8. Thus, Q39 and resistor R75 form alevel shifting circuit. Those skilled in the art will realize, however,that the use of any driver circuit or device is well within the broadscope of the present invention.

[0021] The gate drive circuit further includes resistor R76 seriallycoupled between a drive signal phase (PHB) and the emitter of Q39. PHBturns isolated gate device Q8 ON and OFF. As disclosed above, PHBoperates 180° out of phase from a second drive signal PHA that controlsQ7.

[0022] The drive voltage Vb from drive signal phase PHB drives the gateof Q8 to turn ON the isolated gate device Q8. The voltage required tomaintain Q8 in a fully ON state is between 5V and 8V. This voltage isapproximately equal to the voltage drop across R75 minus the voltagedrop across the base to emitter junction of Q11.

[0023] Due to the circuitry configuration as described above, aparasitic capacitance (C parasitic) occurs between the base and thecollector of Q39. Those having ordinary skill in the art would normallynot want the circuit configured in this manner because the occurrence ofC parasitic slows the switching speed of the circuit. However, thepresent invention includes the previously unknown technique of using Cparasitic to reduce the peak current seen by the MOSFETs as describedbelow.

[0024] In order to reduce the peak current seen by Q8, the current inthe H-bridge needs to be reduced. This current reduction is accomplishedby discharging C parasitic. The current to discharge C parasitic comesfrom Q39. Since the discharge current is from the same current source(Q39) used to maintain 10 VDC across R75, the current through R75 isnecessarily reduced. When the current through R75 is reduced, thevoltage drop across R75 is proportionately reduced. As stated above, thevoltage at the gate of Q8 is approximately the voltage drop across R75minus the voltage drop across the base-to-emitter junction of Q11.Therefore, reducing the voltage across R75 corresponds to a voltagereduction at the gate of Q8. The voltage at the gate of Q8 goes down tobetween 2 V-4 V. This voltage drop increases the impedance through theMOSFET channel, reducing the maximum current through Q8 to about 20Amps.

[0025] The lamp 50 is initially OFF and remains OFF until the voltage atthe secondary side of the transformer 60 is sufficient to ignite thelamp 50. The ballast normally outputs approximately −400VDC. Duringignition another approximately −600VDC is outputted and added to theprimary side of the transformer 60. The combined approximate −1000VD ispresented to the primary side of the transformer 60. The secondary sideof the transformer 60 has an output voltage of about 23,000 V, which issufficient to ignite the lamp.

[0026] The ignition sequence is from zero to five microseconds induration. Upon ignition, the lamp 50 begins to “glow”, but is not yet“arcing”. Therefore the current is not yet flowing and there is a veryhigh, nearly infinite resistance. The lamp needs to be “arcing” to allowcurrent to flow. The about −400VDC across Vout supplies the energy toinitiate current flow and establish “arcing”. Once the lamp is “arcing”,the resistance of the lamp drops to about 10 ohms and a surge of currentbegins flowing through the circuit. In a time span of approximately 13microseconds, the current changes from zero to a maximum of about 20Amps due to the operation of the control circuit as described above.

[0027] As the current increases toward its peak value, the about −400VDCat Vout decreases toward zero volts. This resultant voltage drop createsa charge capacitance, C parasitic, due to the configuration of thecircuitry as stated above. Since transistor Q39 maintains 10VDC acrossresistor R75, the voltage initially across C parasitic would be −390VDC.This voltage is also decreasing toward zero volts with the increase incurrent.

[0028] C parasitic has been charged so that the positive side is atground and the negative side is at the upper terminal of R75. For Cparasitic to discharge, current has to flow through C parasitic from theR75 side to the ground side of C parasitic. The current used todischarge C parasitic comes from Q39. Since this current would normallybe used to maintain the 10VDC across R75, by using some of the currentto discharge C parasitic, the current through and hence the voltageacross R75, is reduced. As a result, the voltage at the gate of Q8 goesdown to between 2 to 4 V. Reducing the voltage at the gate of Q8increases the impedance of Q8 and the resulting voltage drop at the gateof Q8 results in a drain to source voltage increase from 0 to 150 V,which limits the lamp peak current to 20 A, which is smaller than the30A normally found in such devices. This means that the MOSFETs, andthus the device, can be smaller.

[0029] The current limiting occurs during the first phase B cycle. Oncethe lamp reaches a steady state, phase B and phase A alternate so thateither Q6 and Q8 are ON, or Q5 and Q7 are ON. The voltage through thesystem is maintained so that raw lamp power consumption is 35 watts. 35watts of power translates into a nominal Vout of approximately 85 volts,although the voltage may be anywhere in the range of 60 to 100 volts.

[0030] The circuit could be reconfigured to force the circuit to operatein the opposite direction, wherein the peak limiting occurs during thefirst phase A cycle. External circuitry can be added and themicroprocessor controlling the main power output can also be used toforce the circuit to operate in the opposite direction.

[0031] The embodiment that has been described herein is set forth hereby way of illustration, but not of limitation. It is apparent that otherembodiments that will be readily apparent to those skilled in the artmay be made without departing materially from the spirit and scope ofthis invention.

I claim:
 1. An electronic ballast circuit comprising: avoltage-regulated DC power source; an H-bridge comprising a plurality ofH-bridge transistors, said H-bridge being electrically connected to saidpower source; a lamp socket connected to said H-bridge; and a regulatingcircuit electrically connected to at least one of said H-bridgetransistors so as to regulate a peak current flowing through saidH-bridge.
 2. The ballast circuit of claim 1 further comprising: anigniter transformer mounted in series with a discharge lamp andconnected to said H-bridge between said plurality of H-bridgetransistors; said plurality of H-bridge transistors comprising: a firsttransistor between a low side of said power source and a first terminalof said lamp, a second opposite terminal of said lamp being electricallyconnected to a first terminal of said igniter transformer; a secondtransistor between a second terminal of said igniter transformer and thelow side of said power source; a third transistor between a high side ofsaid power source and the second terminal of said igniter; a fourthtransistor between the high side of said power source and the firstterminal of said lamp, said fourth transistor being electricallyconnected to said regulating circuit.
 3. The ballast circuit of claim 2wherein said transistors are MOSFETs.
 4. The ballast circuit of claim 2wherein said discharge lamp is a high intensity discharge lamp.
 5. Theballast circuit of claim 3 wherein said regulating circuit furthercomprises: a drive signal output; a bias resistor electrically connectedto said high side of said power source; a current source transistorhaving a base electrically connected to said low side of said powersource, a collector electrically connected to said bias resistor and anemitter electrically connected to said drive signal output; a first gatedrive transistor and a second gate drive transistor, each having a baseconnected to said bias resistor; and said fourth transistor beingelectrically connected to the emitter of said first gate drivetransistor, wherein a base and a collector of said current sourcetransistor being connected so that a parasitic capacitance existstherebetween.
 6. The ballast circuit of claim 5 wherein said H-bridgefurther comprises: a resistor electrically connected at said low side ofsaid power source; a capacitor electrically connected with saidresistor; and a zener diode electrically connected in parallel with saidcapacitor.
 7. The ballast circuit of claim 1 wherein said regulatingcircuit further comprises: a resistor connected to a high side of saidpower source; and a current source connected to said resistor to providea bias voltage to one of said at least one H-bridge transistor.
 8. Theballast circuit of claim 7 further comprising: an element between thelow side of the power source and a junction formed between said resistorand said current source so that said element diverts current from saidresistor when a voltage supplied by said power source is reduced.
 9. Theballast of claim 8, wherein said current source comprises a currentsource transistor; said at least one H-Bridge transistor is a MOSFEThaving a gate; and said element is a parasitic capacitance between abase of said current source transistor and an emitter of said currentsource transistor.
 10. The ballast of claim 9 further comprising: afirst totem pole transistor having a base and a transmitter; and asecond totem pole transistor having a base and an emitter, each saidbase being connected to said resistor and each said emitter beingelectrically connected to the gate of said one of said H-bridgetransistor.
 11. An electronic ballast circuit comprising: avoltage-regulated DC power source; an H-bridge comprising a plurality ofH-bridge transistors, said H-bridge being electrically connected to saidpower source; a lamp socket connected to said H-bridge; and means forcontrolling at least one of said plurality of H-bridge transistors tolimit current through said H-bridge.
 12. The ballast circuit of claim 11further comprising: an igniter transformer mounted in series with adischarge lamp and connected to said H-bridge between said plurality ofH-bridge transistors; said plurality of transistors comprising: a firsttransistor between a low side of said power source and a first terminalof said lamp, a second opposite terminal of said lamp being electricallyconnected to a first terminal of said igniter transformer; a secondtransistor between a second terminal of said igniter transformer and thelow side of said power source; a third transistor between a high side ofsaid power source and the second terminal of said igniter; a fourthtransistor between the high side of said power source and the firstterminal of said lamp, said fourth transistor being electricallyconnected to said means for controlling.
 13. The ballast circuit ofclaim 12 wherein said transistors are MOSFETs.
 14. The ballast circuitof claim 12 wherein said discharge lamp is a high intensity dischargelamp.
 15. The ballast circuit of claim 13 wherein said means forcontrolling further comprises: a drive signal output; a bias resistorelectrically connected to said high side of said power source; a currentsource transistor having a base electrically connected to said low sideof said power source, a collector electrically connected to said biasresistor and an emitter electrically connected to said drive signaloutput; a first gate drive transistor and a second gate drivetransistor, each having a base connected to said bias resistor; and saidfourth transistor being electrically connected to the emitter of saidfirst gate drive transistor, wherein a base and a collector of saidcurrent source transistor being connected so that a parasiticcapacitance exists therebetween.
 16. The ballast circuit of claim 15further comprising: a resistor electrically connected at said low sideof said H-bridge; a capacitor electrically connected with said resistor;and a zener diode electrically connected in parallel with saidcapacitor.
 17. The ballast circuit of claim 11 wherein said regulatingcircuit further comprises: a resistor connected to a high side of saidpower source; a current source connected to said resistor to provide abias voltage to one of said at least one H-bridge transistor; and anelement between the low side of the power source and a junction formedbetween said resistor and said current source transistor so that saidelement diverts current from said resistor when a voltage supplied bysaid power source is reduced and wherein, said current source comprisesa transistor; said one of said at least one H-bridge transistor is aMOSFET having a gate; and said element is a parasitic capacitancebetween a base of said current source transistor and an emitter of saidcurrent source transistor.
 18. The ballast of claim 17, furthercomprising: a first totem pole transistor having a base and an emitter;a second totem pole transistor having a base and an emitter, each saidbase being connected to said resistor and each said emitter beingelectrically connected to the gate of said one of said at least onetransistor.
 19. A method of operating a high intensity discharge lampcircuit, the steps comprising: supplying an ignition voltage to saiddischarge lamp; providing a bias voltage to a plurality of transistorsconnected in series with said lamp; supplying an arc voltage to thelamp, until an arc is formed in the lamp; and upon arcing, regulatingthe bias voltage to one of said plurality of transistors to limit acurrent flowing through the transistor.
 20. The method of claim 19,wherein in the ignition supplying step, a capacitance is charged by thearc voltage; and in the regulating step, a voltage of the capacitance isdischarged, thereby drawing current away from a bias resistor so as toreduce the bias voltage.